On the lithography floor, a half-degree Celsius drift in soft bake or hard bake isn’t a small deviation—it’s a yield leak. Photoresist profiles shift, critical dimensions open up, and the line starts chasing excursions instead of running them. In coater/developer tracks, the thermal step is where repeatability either holds together or falls apart.
Infrared Heating Precision: Sub-Millimeter Uniformity and Repeatability
We built the coater/developer infrared heater around a short-wave NIR design with engineered radiant distribution. The payoff is a thermal field with sub-millimeter uniformity across the wafer plane, giving you wafer-level temperature control inside tight tolerance. Repeatability comes from closed-loop calibration and stable emissivity management, so every bake lands the same way—batch after batch, shift after shift. This isn’t about hitting peak temperature; it’s about controlling the full thermal budget the resist sees.
Why It Fits the Semiconductor Process Flow
In a Class 1–100 cleanroom, particle generation hits as hard as a temperature error. We chose heater geometry and materials that keep particle counts down, with no outgassing peaks that can contaminate the wafer. The system holds photoresist bake precision for soft bake and hard bake, stabilizing viscosity, solvent removal, and adhesion. That stability shortens qualification cycles and cuts scrap. Energy use drops because infrared transfers heat directly—ramp-up is fast, and there’s minimal thermal mass to wrestle. Reliability is built for 24/7 operation, with fewer maintenance interruptions and predictable replacement intervals.
Practical Implementation Notes
Installation is straightforward on most coater/developer platforms, but thermal interfaces matter. Match the heater mounting to the existing platen and verify the emissivity of the contact surface; otherwise, setpoint-to-wafer temperature can drift. Plan on a short commissioning run to tune PID and confirm uniformity maps for your specific resist stack. One constraint: infrared intensity has to be matched to the thermal mass of the substrate and carrier. Very thin films or exotic substrates may need a tailored power profile to avoid overshoot.